Phison’s New PS8313 UFS Controller Brings to Mobile the High Performance CoXProcessor 2.0 Technology from Its PCIe SSD
Phison Electronics Corp., a world-leading NAND controller IC provider and member of UFSA Board of Directors, announces the PS8313 UFS 2.1 controller at the Flash Memory Summit. PS8313 is a top-performing 2-lane chip targeting Tier-1 flagship mobile chipsets and smartphones. Taking advantage of the latest generation of 3D TLCs, the state-of-the-art solution addresses the increasing capacity and cost per density requirements from the fast-changing mobile market.
UFS, or Universal Flash Storage, is the high-speed interface standard aimed to replace eMMC in mobile phones and SD cards in memory card applications. The latest UFS 2.1specification is equipped with increasing data rates and a differential-signaling serial interface with full-duplex operation. Currently, the best mobile application processors are gearing up the 2-lane UFS interface support at 1200MB/s, 3 times the speed over its predecessor eMMC, and PS8313 will be a leading independent UFS controller to meet the impressive throughput requirement. The powerful PS8313’s sequential and random read/write speeds on 3D NAND are topping 920/550MB/s and 67K/62K IOPS, which are comparable to SATA SSDs, bringing an unparalleled new experience to the ultimate smartphone users for gaming, high-resolution video and streaming applications.
PS8313 utilizes an advanced 28nm process while Phison’s innovative in-house M-PHY, UniPro and UFS IPs gives a total control over the solution for scalability. Equipped with an ultra-compact and low-power LDPC ECC engine designed for the latest 3D TLC, the controller effectively enhances memory endurance and reliability. The efficient design also removes the need for additional passive components in the UFS package, simplifying the BOM for the device manufacturers. Supporting a maximum of 8 NAND dice, PS8313 can enable up to 256GB of NAND storage into several form factors such as the UFS Card, discrete BGA, or UFS-based multichip packages with low-power DRAM (uMCPs) for different mobile applications.
The PS8313 controller consists of the following features:
| ● | UFS 2.1 compliant, High-Speed Gear 3, x2 Lane throughput |
| ● | CoXProcessor 2.0 architecture for NAND operation management, inherited from Phison’s PCIe controllers |
| ● | The new architecture enables PS8313 lower system latency and higher random performance. In a 128GB UFS configuration, the measured performance is similar to a high-end client SATA SSD |
| ● | Innovative in-house M-PHY 3.x (High-Speed Gear 3, x2 Lane), UniPro 1.6x and UFS 2.1 IPs passing various compliance and chipset validations |
| ● | LDPC ECC with Adaptive Signal Processing, a 30% improvement in correction capability over a traditional LDPC engine |
| ● | Maximum 3D TLC Sequential Read/Write – 920/550MB/s* |
| ● | Maximum 3D TLC 4K Random Read/Write – 67K/62K IOPS*
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“Phison aims to support the Tier-1 smartphone flagship models by introducing the UFS 2-lane PS8313 controller”, said Phison CEO and co-founder K.S. Pua. “For the best phones in the market, it will be exciting to see the powerful SSD-level performance on a small 11.5x13mm UFS BGA package. This is one of the most innovative solutions we are enabling with our partners’ 3D TLC NAND, contributing to an incredible application experience in the premium smartphone segment where the most competitive performance gets extra attention.”
* Raw performance without OS based on internal testing; performance may be lower depending upon host platform
